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Implement a new JIT for Arm devices (#6057)

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* Implement a new JIT for Arm devices

* Auto-format

* Make a lot of Assembler members read-only

* More read-only

* Fix more warnings

* ObjectDisposedException.ThrowIf

* New JIT cache for platforms that enforce W^X, currently unused

* Remove unused using

* Fix assert

* Pass memory manager type around

* Safe memory manager mode support + other improvements

* Actual safe memory manager mode masking support

* PR feedback
This commit is contained in:
gdkchan
2024-01-20 11:11:28 -03:00
committed by GitHub
parent 331c07807f
commit 427b7d06b5
135 changed files with 43322 additions and 24 deletions
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97
src/Ryujinx.Cpu/LightningJit/Arm32/Target/Arm64/InstEmitNeonHash.cs Normal file
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using System.Diagnostics;
namespace Ryujinx.Cpu.LightningJit.Arm32.Target.Arm64
{
static class InstEmitNeonHash
{
public static void Sha1c(CodeGenContext context, uint rd, uint rn, uint rm, uint q)
{
// TODO: Feature check, emulation if not supported.
Debug.Assert(q == 1);
InstEmitNeonCommon.EmitVectorBinary(context, rd, rn, rm, context.Arm64Assembler.Sha1c);
}
public static void Sha1h(CodeGenContext context, uint rd, uint rm, uint size)
{
// TODO: Feature check, emulation if not supported.
Debug.Assert(size == 2);
InstEmitNeonCommon.EmitVectorUnary(context, rd, rm, context.Arm64Assembler.Sha1h);
}
public static void Sha1m(CodeGenContext context, uint rd, uint rn, uint rm, uint q)
{
// TODO: Feature check, emulation if not supported.
Debug.Assert(q == 1);
InstEmitNeonCommon.EmitVectorBinary(context, rd, rn, rm, context.Arm64Assembler.Sha1m);
}
public static void Sha1p(CodeGenContext context, uint rd, uint rn, uint rm, uint q)
{
// TODO: Feature check, emulation if not supported.
Debug.Assert(q == 1);
InstEmitNeonCommon.EmitVectorBinary(context, rd, rn, rm, context.Arm64Assembler.Sha1p);
}
public static void Sha1su0(CodeGenContext context, uint rd, uint rn, uint rm, uint q)
{
// TODO: Feature check, emulation if not supported.
Debug.Assert(q == 1);
InstEmitNeonCommon.EmitVectorBinary(context, rd, rn, rm, context.Arm64Assembler.Sha1su0);
}
public static void Sha1su1(CodeGenContext context, uint rd, uint rm, uint size)
{
// TODO: Feature check, emulation if not supported.
Debug.Assert(size == 2);
InstEmitNeonCommon.EmitVectorUnary(context, rd, rm, context.Arm64Assembler.Sha1su1);
}
public static void Sha256h(CodeGenContext context, uint rd, uint rn, uint rm, uint q)
{
// TODO: Feature check, emulation if not supported.
Debug.Assert(q == 1);
InstEmitNeonCommon.EmitVectorBinary(context, rd, rn, rm, context.Arm64Assembler.Sha256h);
}
public static void Sha256h2(CodeGenContext context, uint rd, uint rn, uint rm, uint q)
{
// TODO: Feature check, emulation if not supported.
Debug.Assert(q == 1);
InstEmitNeonCommon.EmitVectorBinary(context, rd, rn, rm, context.Arm64Assembler.Sha256h2);
}
public static void Sha256su0(CodeGenContext context, uint rd, uint rm, uint size)
{
// TODO: Feature check, emulation if not supported.
Debug.Assert(size == 2);
InstEmitNeonCommon.EmitVectorUnary(context, rd, rm, context.Arm64Assembler.Sha256su0);
}
public static void Sha256su1(CodeGenContext context, uint rd, uint rn, uint rm, uint q)
{
// TODO: Feature check, emulation if not supported.
Debug.Assert(q == 1);
InstEmitNeonCommon.EmitVectorBinary(context, rd, rn, rm, context.Arm64Assembler.Sha256su1);
}
}
}