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Prefer using collection expressions with implicit object creation when the type is clear

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This commit is contained in:
Marco Carvalho
2024-12-27 13:23:31 -03:00
parent 850df38f1e
commit 57d1486da9
510 changed files with 6022 additions and 6212 deletions
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12
src/ARMeilleure/CodeGen/Arm64/CodeGenContext.cs
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@@ -42,7 +42,7 @@ namespace ARMeilleure.CodeGen.Arm64
{
Offset = offset;
Symbol = symbol;
LdrOffsets = new List<(Operand, int)>();
LdrOffsets = [];
}
}
@@ -78,9 +78,9 @@ namespace ARMeilleure.CodeGen.Arm64
CallArgsRegionSize = maxCallArgs * 16;
FpLrSaveRegionSize = hasCall ? 16 : 0;
_visitedBlocks = new Dictionary<BasicBlock, long>();
_pendingBranches = new Dictionary<BasicBlock, List<(ArmCondition, long)>>();
_constantPool = new Dictionary<ulong, ConstantPoolEntry>();
_visitedBlocks = [];
_pendingBranches = [];
_constantPool = [];
_relocatable = relocatable;
}
@@ -121,7 +121,7 @@ namespace ARMeilleure.CodeGen.Arm64
{
if (!_pendingBranches.TryGetValue(target, out var list))
{
list = new List<(ArmCondition, long)>();
list = [];
_pendingBranches.Add(target, list);
}
@@ -266,7 +266,7 @@ namespace ARMeilleure.CodeGen.Arm64
}
else
{
relocInfo = new RelocInfo(Array.Empty<RelocEntry>());
relocInfo = new RelocInfo([]);
}
return (code, relocInfo);

4
src/ARMeilleure/CodeGen/Arm64/CodeGenerator.cs
View File

@@ -1079,7 +1079,7 @@ namespace ARMeilleure.CodeGen.Arm64
private static UnwindInfo WritePrologue(CodeGenContext context)
{
List<UnwindPushEntry> pushEntries = new();
List<UnwindPushEntry> pushEntries = [];
Operand rsp = Register(SpRegister);
@@ -1141,7 +1141,7 @@ namespace ARMeilleure.CodeGen.Arm64
}
}
return new UnwindInfo(pushEntries.ToArray(), context.StreamOffset);
return new UnwindInfo([.. pushEntries], context.StreamOffset);
}
private static void WritePrologueCalleeSavesPreIndexed(

6
src/ARMeilleure/CodeGen/Arm64/HardwareCapabilities.cs
View File

@@ -140,8 +140,8 @@ namespace ARMeilleure.CodeGen.Arm64
return false;
}
private static readonly string[] _sysctlNames = new string[]
{
private static readonly string[] _sysctlNames =
[
"hw.optional.floatingpoint",
"hw.optional.AdvSIMD",
"hw.optional.arm.FEAT_FP16",
@@ -151,7 +151,7 @@ namespace ARMeilleure.CodeGen.Arm64
"hw.optional.armv8_crc32",
"hw.optional.arm.FEAT_SHA1",
"hw.optional.arm.FEAT_SHA256",
};
];
[Flags]
public enum MacOsFeatureFlags

24
src/ARMeilleure/CodeGen/Arm64/PreAllocator.cs
View File

@@ -16,7 +16,7 @@ namespace ARMeilleure.CodeGen.Arm64
public ConstantDict()
{
_constants = new Dictionary<(ulong, OperandType), Operand>();
_constants = [];
}
public void Add(ulong value, OperandType type, Operand local)
@@ -261,10 +261,10 @@ namespace ARMeilleure.CodeGen.Arm64
Operand dest = operation.Destination;
List<Operand> sources = new()
{
List<Operand> sources =
[
operation.GetSource(0),
};
];
int argsCount = operation.SourcesCount - 1;
@@ -357,7 +357,7 @@ namespace ARMeilleure.CodeGen.Arm64
}
}
operation.SetSources(sources.ToArray());
operation.SetSources([.. sources]);
}
private static void InsertTailcallCopies(ConstantDict constants,
@@ -365,10 +365,10 @@ namespace ARMeilleure.CodeGen.Arm64
Operation node,
Operation operation)
{
List<Operand> sources = new()
{
List<Operand> sources =
[
operation.GetSource(0),
};
];
int argsCount = operation.SourcesCount - 1;
@@ -435,7 +435,7 @@ namespace ARMeilleure.CodeGen.Arm64
sources[0] = tcAddress;
operation.SetSources(sources.ToArray());
operation.SetSources([.. sources]);
}
private static Operation GenerateCompareAndSwap(IntrusiveList<Operation> nodes, Operation node)
@@ -468,8 +468,8 @@ namespace ARMeilleure.CodeGen.Arm64
// Update the sources and destinations with split 64-bit halfs of the whole 128-bit values.
// We also need a additional registers that will be used to store temporary information.
operation.SetDestinations(new[] { actualLow, actualHigh, Local(OperandType.I64), Local(OperandType.I64) });
operation.SetSources(new[] { address, expectedLow, expectedHigh, desiredLow, desiredHigh });
operation.SetDestinations([actualLow, actualHigh, Local(OperandType.I64), Local(OperandType.I64)]);
operation.SetSources([address, expectedLow, expectedHigh, desiredLow, desiredHigh]);
// Add some dummy uses of the input operands, as the CAS operation will be a loop,
// so they can't be used as destination operand.
@@ -486,7 +486,7 @@ namespace ARMeilleure.CodeGen.Arm64
else
{
// We need a additional register where the store result will be written to.
node.SetDestinations(new[] { node.Destination, Local(OperandType.I32) });
node.SetDestinations([node.Destination, Local(OperandType.I32)]);
// Add some dummy uses of the input operands, as the CAS operation will be a loop,
// so they can't be used as destination operand.

12
src/ARMeilleure/CodeGen/RegisterAllocators/CopyResolver.cs
View File

@@ -31,7 +31,7 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
public ParallelCopy()
{
_copies = new List<Copy>();
_copies = [];
}
public void AddCopy(Register dest, Register source, OperandType type)
@@ -41,10 +41,10 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
public void Sequence(List<Operation> sequence)
{
Dictionary<Register, Register> locations = new();
Dictionary<Register, Register> sources = new();
Dictionary<Register, Register> locations = [];
Dictionary<Register, Register> sources = [];
Dictionary<Register, OperandType> types = new();
Dictionary<Register, OperandType> types = [];
Queue<Register> pendingQueue = new();
Queue<Register> readyQueue = new();
@@ -218,7 +218,7 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
public Operation[] Sequence()
{
List<Operation> sequence = new();
List<Operation> sequence = [];
if (_spillQueue != null)
{
@@ -238,7 +238,7 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
}
}
return sequence.ToArray();
return [.. sequence];
}
private static Operand GetRegister(Register reg, OperandType type)

12
src/ARMeilleure/CodeGen/RegisterAllocators/LinearScanAllocator.cs
View File

@@ -574,7 +574,7 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
private void InsertSplitCopies()
{
Dictionary<int, CopyResolver> copyResolvers = new();
Dictionary<int, CopyResolver> copyResolvers = [];
CopyResolver GetCopyResolver(int position)
{
@@ -799,8 +799,8 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
private void NumberLocals(ControlFlowGraph cfg, int registersCount)
{
_operationNodes = new List<(IntrusiveList<Operation>, Operation)>();
_intervals = new List<LiveInterval>();
_operationNodes = [];
_intervals = [];
for (int index = 0; index < registersCount; index++)
{
@@ -839,7 +839,7 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
{
dest.NumberLocal(_intervals.Count);
LiveInterval interval = new LiveInterval(dest);
LiveInterval interval = new(dest);
_intervals.Add(interval);
SetVisited(dest);
@@ -873,7 +873,7 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
}
}
_parentIntervals = _intervals.ToArray();
_parentIntervals = [.. _intervals];
}
private void BuildIntervals(ControlFlowGraph cfg, AllocationContext context)
@@ -980,7 +980,7 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
_blockLiveIn = blkLiveIn;
_blockEdges = new HashSet<int>();
_blockEdges = [];
// Compute lifetime intervals.
int operationPos = _operationsCount;

8
src/ARMeilleure/CodeGen/X86/Assembler.cs
View File

@@ -73,10 +73,10 @@ namespace ARMeilleure.CodeGen.X86
public Assembler(Stream stream, bool relocatable)
{
_stream = stream;
_labels = new Dictionary<Operand, long>();
_jumps = new List<Jump>();
_labels = [];
_jumps = [];
_relocs = relocatable ? new List<Reloc>() : null;
_relocs = relocatable ? [] : null;
}
public void MarkLabel(Operand label)
@@ -1418,7 +1418,7 @@ namespace ARMeilleure.CodeGen.X86
int relocOffset = 0;
var relocEntries = hasRelocs
? new RelocEntry[relocs.Length]
: Array.Empty<RelocEntry>();
: [];
for (int i = 0; i < jumps.Length; i++)
{

4
src/ARMeilleure/CodeGen/X86/CodeGenerator.cs
View File

@@ -1748,7 +1748,7 @@ namespace ARMeilleure.CodeGen.X86
private static UnwindInfo WritePrologue(CodeGenContext context)
{
List<UnwindPushEntry> pushEntries = new();
List<UnwindPushEntry> pushEntries = [];
Operand rsp = Register(X86Register.Rsp);
@@ -1800,7 +1800,7 @@ namespace ARMeilleure.CodeGen.X86
mask &= ~(1 << bit);
}
return new UnwindInfo(pushEntries.ToArray(), context.StreamOffset);
return new UnwindInfo([.. pushEntries], context.StreamOffset);
}
private static void WriteEpilogue(CodeGenContext context)

6
src/ARMeilleure/CodeGen/X86/HardwareCapabilities.cs
View File

@@ -40,12 +40,12 @@ namespace ARMeilleure.CodeGen.X86
return 0;
}
ReadOnlySpan<byte> asmGetXcr0 = new byte[]
{
ReadOnlySpan<byte> asmGetXcr0 =
[
0x31, 0xc9, // xor ecx, ecx
0xf, 0x01, 0xd0, // xgetbv
0xc3, // ret
};
];
using MemoryBlock memGetXcr0 = new((ulong)asmGetXcr0.Length);

14
src/ARMeilleure/CodeGen/X86/PreAllocator.cs
View File

@@ -124,13 +124,13 @@ namespace ARMeilleure.CodeGen.X86
{
int stackOffset = stackAlloc.Allocate(OperandType.I32);
node.SetSources(new Operand[] { Const(stackOffset), node.GetSource(0) });
node.SetSources([Const(stackOffset), node.GetSource(0)]);
}
else if (node.Intrinsic == Intrinsic.X86Stmxcsr)
{
int stackOffset = stackAlloc.Allocate(OperandType.I32);
node.SetSources(new Operand[] { Const(stackOffset) });
node.SetSources([Const(stackOffset)]);
}
break;
}
@@ -253,8 +253,8 @@ namespace ARMeilleure.CodeGen.X86
node = nodes.AddAfter(node, Operation(Instruction.VectorCreateScalar, dest, rax));
nodes.AddAfter(node, Operation(Instruction.VectorInsert, dest, dest, rdx, Const(1)));
operation.SetDestinations(new Operand[] { rdx, rax });
operation.SetSources(new Operand[] { operation.GetSource(0), rdx, rax, rcx, rbx });
operation.SetDestinations([rdx, rax]);
operation.SetSources([operation.GetSource(0), rdx, rax, rcx, rbx]);
}
else
{
@@ -274,7 +274,7 @@ namespace ARMeilleure.CodeGen.X86
nodes.AddBefore(node, Operation(Instruction.Copy, temp, newValue));
node.SetSources(new Operand[] { node.GetSource(0), rax, temp });
node.SetSources([node.GetSource(0), rax, temp]);
nodes.AddAfter(node, Operation(Instruction.Copy, dest, rax));
@@ -303,7 +303,7 @@ namespace ARMeilleure.CodeGen.X86
nodes.AddAfter(node, Operation(Instruction.Copy, dest, rax));
node.SetSources(new Operand[] { rdx, rax, node.GetSource(1) });
node.SetSources([rdx, rax, node.GetSource(1)]);
node.Destination = rax;
}
@@ -348,7 +348,7 @@ namespace ARMeilleure.CodeGen.X86
nodes.AddAfter(node, Operation(Instruction.Copy, dest, rdx));
node.SetDestinations(new Operand[] { rdx, rax });
node.SetDestinations([rdx, rax]);
break;
}

16
src/ARMeilleure/CodeGen/X86/PreAllocatorSystemV.cs
View File

@@ -14,10 +14,10 @@ namespace ARMeilleure.CodeGen.X86
{
Operand dest = node.Destination;
List<Operand> sources = new()
{
List<Operand> sources =
[
node.GetSource(0),
};
];
int argsCount = node.SourcesCount - 1;
@@ -84,7 +84,7 @@ namespace ARMeilleure.CodeGen.X86
}
}
node.SetSources(sources.ToArray());
node.SetSources([.. sources]);
if (dest != default)
{
@@ -117,10 +117,10 @@ namespace ARMeilleure.CodeGen.X86
public static void InsertTailcallCopies(IntrusiveList<Operation> nodes, Operation node)
{
List<Operand> sources = new()
{
List<Operand> sources =
[
node.GetSource(0),
};
];
int argsCount = node.SourcesCount - 1;
@@ -187,7 +187,7 @@ namespace ARMeilleure.CodeGen.X86
sources[0] = retReg;
node.SetSources(sources.ToArray());
node.SetSources([.. sources]);
}
public static Operation InsertLoadArgumentCopy(

2
src/ARMeilleure/CodeGen/X86/PreAllocatorWindows.cs
View File

@@ -321,7 +321,7 @@ namespace ARMeilleure.CodeGen.X86
nodes.AddBefore(node, retCopyOp);
}
node.SetSources(Array.Empty<Operand>());
node.SetSources([]);
}
}
}