From 6e2631dd7b531d20aa5a28430d51d0dc8b37a07c Mon Sep 17 00:00:00 2001 From: LotP1 Date: Sat, 16 Nov 2024 19:02:46 +0100 Subject: [PATCH] PPTC Profiles & FunctionTable options The Sparse Jit Function Table sizes now depend on the LowPowerPTC setting. This means lower power devices won't be impacted as hard by the higher ram speed requirement of GiantBlock. Also added functionality to the PPTC Initializer so it now supports different PPTC Profiles simultaneously, which makes switching between TinyBlock/LowPower and GiantBlock/HighPower seamless. This also opens the door for the potential of PPTC cache with exefs mods enabled in the future. Default (aka HighPower) currently has an Avalonia bug that causes a crash when starting a game, it can be bypassed be clicking the window multiple times durring loading until the window unfreezes. --- src/ARMeilleure/Common/AddressTablePresets.cs | 23 ++++++++++++++++++- src/ARMeilleure/Translation/PTC/Ptc.cs | 8 +++---- src/ARMeilleure/Translation/Translator.cs | 4 ++-- src/Ryujinx.Cpu/AddressTable.cs | 4 ++-- src/Ryujinx.Cpu/AppleHv/HvCpuContext.cs | 4 ++-- src/Ryujinx.Cpu/AppleHv/HvEngine.cs | 4 ++-- src/Ryujinx.Cpu/ICpuContext.cs | 2 +- src/Ryujinx.Cpu/ICpuEngine.cs | 2 +- src/Ryujinx.Cpu/Jit/JitCpuContext.cs | 8 +++---- src/Ryujinx.Cpu/Jit/JitEngine.cs | 4 ++-- .../LightningJit/LightningJitCpuContext.cs | 6 ++--- .../LightningJit/LightningJitEngine.cs | 4 ++-- src/Ryujinx.HLE/HLEConfiguration.cs | 7 ++++++ src/Ryujinx.HLE/HOS/ArmProcessContext.cs | 13 +++++++---- .../HOS/ArmProcessContextFactory.cs | 11 +++++---- src/Ryujinx.Headless.SDL2/Options.cs | 3 +++ src/Ryujinx.Headless.SDL2/Program.cs | 1 + src/Ryujinx.Tests/Cpu/CpuContext.cs | 4 ++-- src/Ryujinx.Tests/Cpu/CpuTest.cs | 2 +- src/Ryujinx.Tests/Cpu/CpuTest32.cs | 2 +- src/Ryujinx.Tests/Cpu/EnvironmentTests.cs | 2 +- src/Ryujinx.Tests/Memory/PartialUnmaps.cs | 2 +- src/Ryujinx/AppHost.cs | 1 + 23 files changed, 79 insertions(+), 42 deletions(-) diff --git a/src/ARMeilleure/Common/AddressTablePresets.cs b/src/ARMeilleure/Common/AddressTablePresets.cs index e18c6cfe4..629e55e9c 100644 --- a/src/ARMeilleure/Common/AddressTablePresets.cs +++ b/src/ARMeilleure/Common/AddressTablePresets.cs @@ -36,11 +36,32 @@ namespace ARMeilleure.Common new( 1, 9), }; - public static AddressTableLevel[] GetArmPreset(bool for64Bits, bool sparse) + private static readonly AddressTableLevel[] _levels64BitSparseGiant = + new AddressTableLevel[] + { + new( 38, 1), + new( 2, 36), + }; + + private static readonly AddressTableLevel[] _levels32BitSparseGiant = + new AddressTableLevel[] + { + new( 31, 1), + new( 1, 30), + }; + + public static AddressTableLevel[] GetArmPreset(bool for64Bits, bool sparse, bool lowPower = false) { if (sparse) { + if (lowPower) + { + return for64Bits ? _levels64BitSparseTiny : _levels32BitSparseTiny; + } + else + { return for64Bits ? _levels64BitSparseGiant : _levels32BitSparseGiant; + } } else { diff --git a/src/ARMeilleure/Translation/PTC/Ptc.cs b/src/ARMeilleure/Translation/PTC/Ptc.cs index f9f0828e1..3a7c1e506 100644 --- a/src/ARMeilleure/Translation/PTC/Ptc.cs +++ b/src/ARMeilleure/Translation/PTC/Ptc.cs @@ -30,7 +30,7 @@ namespace ARMeilleure.Translation.PTC private const string OuterHeaderMagicString = "PTCohd\0\0"; private const string InnerHeaderMagicString = "PTCihd\0\0"; - private const uint InternalVersion = 6986; //! To be incremented manually for each change to the ARMeilleure project. + private const uint InternalVersion = 6991; //! To be incremented manually for each change to the ARMeilleure project. private const string ActualDir = "0"; private const string BackupDir = "1"; @@ -102,7 +102,7 @@ namespace ARMeilleure.Translation.PTC Disable(); } - public void Initialize(string titleIdText, string displayVersion, bool enabled, MemoryManagerType memoryMode) + public void Initialize(string titleIdText, string displayVersion, bool enabled, MemoryManagerType memoryMode, string cacheSelector) { Wait(); @@ -141,8 +141,8 @@ namespace ARMeilleure.Translation.PTC Directory.CreateDirectory(workPathBackup); } - CachePathActual = Path.Combine(workPathActual, DisplayVersion); - CachePathBackup = Path.Combine(workPathBackup, DisplayVersion); + CachePathActual = Path.Combine(workPathActual, DisplayVersion) + "-" + cacheSelector; + CachePathBackup = Path.Combine(workPathBackup, DisplayVersion) + "-" + cacheSelector; PreLoad(); Profiler.PreLoad(); diff --git a/src/ARMeilleure/Translation/Translator.cs b/src/ARMeilleure/Translation/Translator.cs index a20bef9a4..162368782 100644 --- a/src/ARMeilleure/Translation/Translator.cs +++ b/src/ARMeilleure/Translation/Translator.cs @@ -58,9 +58,9 @@ namespace ARMeilleure.Translation FunctionTable.Fill = (ulong)Stubs.SlowDispatchStub; } - public IPtcLoadState LoadDiskCache(string titleIdText, string displayVersion, bool enabled) + public IPtcLoadState LoadDiskCache(string titleIdText, string displayVersion, bool enabled, string cacheSelector) { - _ptc.Initialize(titleIdText, displayVersion, enabled, Memory.Type); + _ptc.Initialize(titleIdText, displayVersion, enabled, Memory.Type, cacheSelector); return _ptc; } diff --git a/src/Ryujinx.Cpu/AddressTable.cs b/src/Ryujinx.Cpu/AddressTable.cs index d8b9176ca..9f292ab10 100644 --- a/src/Ryujinx.Cpu/AddressTable.cs +++ b/src/Ryujinx.Cpu/AddressTable.cs @@ -178,12 +178,12 @@ namespace ARMeilleure.Common /// True if the guest is A64, false otherwise /// Memory manager type /// An for ARM function lookup - public static AddressTable CreateForArm(bool for64Bits, MemoryManagerType type) + public static AddressTable CreateForArm(bool for64Bits, MemoryManagerType type, bool lowPower) { // Assume software memory means that we don't want to use any signal handlers. bool sparse = type != MemoryManagerType.SoftwareMmu && type != MemoryManagerType.SoftwarePageTable; - return new AddressTable(AddressTablePresets.GetArmPreset(for64Bits, sparse), sparse); + return new AddressTable(AddressTablePresets.GetArmPreset(for64Bits, sparse, lowPower), sparse); } /// diff --git a/src/Ryujinx.Cpu/AppleHv/HvCpuContext.cs b/src/Ryujinx.Cpu/AppleHv/HvCpuContext.cs index 99e4c0479..9c761bfce 100644 --- a/src/Ryujinx.Cpu/AppleHv/HvCpuContext.cs +++ b/src/Ryujinx.Cpu/AppleHv/HvCpuContext.cs @@ -9,7 +9,7 @@ namespace Ryujinx.Cpu.AppleHv private readonly ITickSource _tickSource; private readonly HvMemoryManager _memoryManager; - public HvCpuContext(ITickSource tickSource, IMemoryManager memory, bool for64Bit) + public HvCpuContext(ITickSource tickSource, IMemoryManager memory, bool for64Bit, bool lowPower) { _tickSource = tickSource; _memoryManager = (HvMemoryManager)memory; @@ -32,7 +32,7 @@ namespace Ryujinx.Cpu.AppleHv { } - public IDiskCacheLoadState LoadDiskCache(string titleIdText, string displayVersion, bool enabled) + public IDiskCacheLoadState LoadDiskCache(string titleIdText, string displayVersion, bool enabled, string cacheSelector) { return new DummyDiskCacheLoadState(); } diff --git a/src/Ryujinx.Cpu/AppleHv/HvEngine.cs b/src/Ryujinx.Cpu/AppleHv/HvEngine.cs index c3c1a4484..97e2ca953 100644 --- a/src/Ryujinx.Cpu/AppleHv/HvEngine.cs +++ b/src/Ryujinx.Cpu/AppleHv/HvEngine.cs @@ -14,9 +14,9 @@ namespace Ryujinx.Cpu.AppleHv } /// - public ICpuContext CreateCpuContext(IMemoryManager memoryManager, bool for64Bit) + public ICpuContext CreateCpuContext(IMemoryManager memoryManager, bool for64Bit, bool lowPower) { - return new HvCpuContext(_tickSource, memoryManager, for64Bit); + return new HvCpuContext(_tickSource, memoryManager, for64Bit, lowPower); } } } diff --git a/src/Ryujinx.Cpu/ICpuContext.cs b/src/Ryujinx.Cpu/ICpuContext.cs index edcebdfc4..1fb3b674d 100644 --- a/src/Ryujinx.Cpu/ICpuContext.cs +++ b/src/Ryujinx.Cpu/ICpuContext.cs @@ -48,7 +48,7 @@ namespace Ryujinx.Cpu /// Version of the application /// True if the cache should be loaded from disk if it exists, false otherwise /// Disk cache load progress reporter and manager - IDiskCacheLoadState LoadDiskCache(string titleIdText, string displayVersion, bool enabled); + IDiskCacheLoadState LoadDiskCache(string titleIdText, string displayVersion, bool enabled, string cacheSelector); /// /// Indicates that code has been loaded into guest memory, and that it might be executed in the future. diff --git a/src/Ryujinx.Cpu/ICpuEngine.cs b/src/Ryujinx.Cpu/ICpuEngine.cs index b53b23a8c..e3b8cca74 100644 --- a/src/Ryujinx.Cpu/ICpuEngine.cs +++ b/src/Ryujinx.Cpu/ICpuEngine.cs @@ -13,6 +13,6 @@ namespace Ryujinx.Cpu /// Memory manager for the address space of the context /// Indicates if the context will be used to run 64-bit or 32-bit Arm code /// CPU context - ICpuContext CreateCpuContext(IMemoryManager memoryManager, bool for64Bit); + ICpuContext CreateCpuContext(IMemoryManager memoryManager, bool for64Bit, bool lowPower); } } diff --git a/src/Ryujinx.Cpu/Jit/JitCpuContext.cs b/src/Ryujinx.Cpu/Jit/JitCpuContext.cs index 9d9e02707..aaa0bc87c 100644 --- a/src/Ryujinx.Cpu/Jit/JitCpuContext.cs +++ b/src/Ryujinx.Cpu/Jit/JitCpuContext.cs @@ -12,10 +12,10 @@ namespace Ryujinx.Cpu.Jit private readonly Translator _translator; private readonly AddressTable _functionTable; - public JitCpuContext(ITickSource tickSource, IMemoryManager memory, bool for64Bit) + public JitCpuContext(ITickSource tickSource, IMemoryManager memory, bool for64Bit, bool lowPower) { _tickSource = tickSource; - _functionTable = AddressTable.CreateForArm(for64Bit, memory.Type); + _functionTable = AddressTable.CreateForArm(for64Bit, memory.Type, lowPower); _translator = new Translator(new JitMemoryAllocator(forJit: true), memory, _functionTable); if (memory.Type.IsHostMappedOrTracked()) @@ -50,9 +50,9 @@ namespace Ryujinx.Cpu.Jit } /// - public IDiskCacheLoadState LoadDiskCache(string titleIdText, string displayVersion, bool enabled) + public IDiskCacheLoadState LoadDiskCache(string titleIdText, string displayVersion, bool enabled, string cacheSelector) { - return new JitDiskCacheLoadState(_translator.LoadDiskCache(titleIdText, displayVersion, enabled)); + return new JitDiskCacheLoadState(_translator.LoadDiskCache(titleIdText, displayVersion, enabled, cacheSelector)); } /// diff --git a/src/Ryujinx.Cpu/Jit/JitEngine.cs b/src/Ryujinx.Cpu/Jit/JitEngine.cs index deebb8b9e..e70b863ff 100644 --- a/src/Ryujinx.Cpu/Jit/JitEngine.cs +++ b/src/Ryujinx.Cpu/Jit/JitEngine.cs @@ -12,9 +12,9 @@ namespace Ryujinx.Cpu.Jit } /// - public ICpuContext CreateCpuContext(IMemoryManager memoryManager, bool for64Bit) + public ICpuContext CreateCpuContext(IMemoryManager memoryManager, bool for64Bit, bool lowPower) { - return new JitCpuContext(_tickSource, memoryManager, for64Bit); + return new JitCpuContext(_tickSource, memoryManager, for64Bit, lowPower); } } } diff --git a/src/Ryujinx.Cpu/LightningJit/LightningJitCpuContext.cs b/src/Ryujinx.Cpu/LightningJit/LightningJitCpuContext.cs index 0ac9dc8b5..1a17d744b 100644 --- a/src/Ryujinx.Cpu/LightningJit/LightningJitCpuContext.cs +++ b/src/Ryujinx.Cpu/LightningJit/LightningJitCpuContext.cs @@ -11,11 +11,11 @@ namespace Ryujinx.Cpu.LightningJit private readonly Translator _translator; private readonly AddressTable _functionTable; - public LightningJitCpuContext(ITickSource tickSource, IMemoryManager memory, bool for64Bit) + public LightningJitCpuContext(ITickSource tickSource, IMemoryManager memory, bool for64Bit, bool lowPower) { _tickSource = tickSource; - _functionTable = AddressTable.CreateForArm(for64Bit, memory.Type); + _functionTable = AddressTable.CreateForArm(for64Bit, memory.Type, lowPower); _translator = new Translator(memory, _functionTable); @@ -46,7 +46,7 @@ namespace Ryujinx.Cpu.LightningJit } /// - public IDiskCacheLoadState LoadDiskCache(string titleIdText, string displayVersion, bool enabled) + public IDiskCacheLoadState LoadDiskCache(string titleIdText, string displayVersion, bool enabled, string cacheSelector) { return new DummyDiskCacheLoadState(); } diff --git a/src/Ryujinx.Cpu/LightningJit/LightningJitEngine.cs b/src/Ryujinx.Cpu/LightningJit/LightningJitEngine.cs index c97ddc7c7..607e69969 100644 --- a/src/Ryujinx.Cpu/LightningJit/LightningJitEngine.cs +++ b/src/Ryujinx.Cpu/LightningJit/LightningJitEngine.cs @@ -12,9 +12,9 @@ namespace Ryujinx.Cpu.LightningJit } /// - public ICpuContext CreateCpuContext(IMemoryManager memoryManager, bool for64Bit) + public ICpuContext CreateCpuContext(IMemoryManager memoryManager, bool for64Bit, bool lowPower) { - return new LightningJitCpuContext(_tickSource, memoryManager, for64Bit); + return new LightningJitCpuContext(_tickSource, memoryManager, for64Bit, lowPower); } } } diff --git a/src/Ryujinx.HLE/HLEConfiguration.cs b/src/Ryujinx.HLE/HLEConfiguration.cs index 70fcf278d..59dcf27b4 100644 --- a/src/Ryujinx.HLE/HLEConfiguration.cs +++ b/src/Ryujinx.HLE/HLEConfiguration.cs @@ -98,6 +98,11 @@ namespace Ryujinx.HLE /// internal readonly bool EnablePtc; + /// + /// Control if the Profiled Translation Cache (PTC) should run in low power mode. + /// + internal readonly bool LowPowerPtc; + /// /// Control if the guest application should be told that there is a Internet connection available. /// @@ -198,6 +203,7 @@ namespace Ryujinx.HLE bool enableVsync, bool enableDockedMode, bool enablePtc, + bool lowPowerPtc, bool enableInternetAccess, IntegrityCheckLevel fsIntegrityCheckLevel, int fsGlobalAccessLogMode, @@ -228,6 +234,7 @@ namespace Ryujinx.HLE EnableVsync = enableVsync; EnableDockedMode = enableDockedMode; EnablePtc = enablePtc; + LowPowerPtc = lowPowerPtc; EnableInternetAccess = enableInternetAccess; FsIntegrityCheckLevel = fsIntegrityCheckLevel; FsGlobalAccessLogMode = fsGlobalAccessLogMode; diff --git a/src/Ryujinx.HLE/HOS/ArmProcessContext.cs b/src/Ryujinx.HLE/HOS/ArmProcessContext.cs index fde489ab7..f873c3deb 100644 --- a/src/Ryujinx.HLE/HOS/ArmProcessContext.cs +++ b/src/Ryujinx.HLE/HOS/ArmProcessContext.cs @@ -13,7 +13,8 @@ namespace Ryujinx.HLE.HOS string displayVersion, bool diskCacheEnabled, ulong codeAddress, - ulong codeSize); + ulong codeSize, + string cacheSelector); } class ArmProcessContext : IArmProcessContext where T : class, IVirtualMemoryManagerTracked, IMemoryManager @@ -33,7 +34,8 @@ namespace Ryujinx.HLE.HOS GpuContext gpuContext, T memoryManager, ulong addressSpaceSize, - bool for64Bit) + bool for64Bit, + bool lowPower) { if (memoryManager is IRefCounted rc) { @@ -44,7 +46,7 @@ namespace Ryujinx.HLE.HOS _pid = pid; _gpuContext = gpuContext; - _cpuContext = cpuEngine.CreateCpuContext(memoryManager, for64Bit); + _cpuContext = cpuEngine.CreateCpuContext(memoryManager, for64Bit, lowPower); _memoryManager = memoryManager; AddressSpaceSize = addressSpaceSize; @@ -67,10 +69,11 @@ namespace Ryujinx.HLE.HOS string displayVersion, bool diskCacheEnabled, ulong codeAddress, - ulong codeSize) + ulong codeSize, + string cacheSelector) { _cpuContext.PrepareCodeRange(codeAddress, codeSize); - return _cpuContext.LoadDiskCache(titleIdText, displayVersion, diskCacheEnabled); + return _cpuContext.LoadDiskCache(titleIdText, displayVersion, diskCacheEnabled, cacheSelector); } public void InvalidateCacheRegion(ulong address, ulong size) diff --git a/src/Ryujinx.HLE/HOS/ArmProcessContextFactory.cs b/src/Ryujinx.HLE/HOS/ArmProcessContextFactory.cs index 6646826cb..41f98768d 100644 --- a/src/Ryujinx.HLE/HOS/ArmProcessContextFactory.cs +++ b/src/Ryujinx.HLE/HOS/ArmProcessContextFactory.cs @@ -48,12 +48,13 @@ namespace Ryujinx.HLE.HOS IArmProcessContext processContext; bool isArm64Host = RuntimeInformation.ProcessArchitecture == Architecture.Arm64; + bool isLowPower = context.Device.Configuration.LowPowerPtc; if (OperatingSystem.IsMacOS() && isArm64Host && for64Bit && context.Device.Configuration.UseHypervisor) { var cpuEngine = new HvEngine(_tickSource); var memoryManager = new HvMemoryManager(context.Memory, addressSpaceSize, invalidAccessHandler); - processContext = new ArmProcessContext(pid, cpuEngine, _gpu, memoryManager, addressSpaceSize, for64Bit); + processContext = new ArmProcessContext(pid, cpuEngine, _gpu, memoryManager, addressSpaceSize, for64Bit, isLowPower); } else { @@ -87,7 +88,7 @@ namespace Ryujinx.HLE.HOS { case MemoryManagerMode.SoftwarePageTable: var memoryManager = new MemoryManager(context.Memory, addressSpaceSize, invalidAccessHandler); - processContext = new ArmProcessContext(pid, cpuEngine, _gpu, memoryManager, addressSpaceSize, for64Bit); + processContext = new ArmProcessContext(pid, cpuEngine, _gpu, memoryManager, addressSpaceSize, for64Bit, isLowPower); break; case MemoryManagerMode.HostMapped: @@ -95,7 +96,7 @@ namespace Ryujinx.HLE.HOS if (addressSpace == null) { var memoryManagerHostTracked = new MemoryManagerHostTracked(context.Memory, addressSpaceSize, mode == MemoryManagerMode.HostMappedUnsafe, invalidAccessHandler); - processContext = new ArmProcessContext(pid, cpuEngine, _gpu, memoryManagerHostTracked, addressSpaceSize, for64Bit); + processContext = new ArmProcessContext(pid, cpuEngine, _gpu, memoryManagerHostTracked, addressSpaceSize, for64Bit, isLowPower); } else { @@ -105,7 +106,7 @@ namespace Ryujinx.HLE.HOS } var memoryManagerHostMapped = new MemoryManagerHostMapped(addressSpace, mode == MemoryManagerMode.HostMappedUnsafe, invalidAccessHandler); - processContext = new ArmProcessContext(pid, cpuEngine, _gpu, memoryManagerHostMapped, addressSpace.AddressSpaceSize, for64Bit); + processContext = new ArmProcessContext(pid, cpuEngine, _gpu, memoryManagerHostMapped, addressSpace.AddressSpaceSize, for64Bit, isLowPower); } break; @@ -114,7 +115,7 @@ namespace Ryujinx.HLE.HOS } } - DiskCacheLoadState = processContext.Initialize(_titleIdText, _displayVersion, _diskCacheEnabled, _codeAddress, _codeSize); + DiskCacheLoadState = processContext.Initialize(_titleIdText, _displayVersion, _diskCacheEnabled, _codeAddress, _codeSize, isLowPower ? "LowPower" : "HighPower"); return processContext; } diff --git a/src/Ryujinx.Headless.SDL2/Options.cs b/src/Ryujinx.Headless.SDL2/Options.cs index 8078ca5e4..d813ade65 100644 --- a/src/Ryujinx.Headless.SDL2/Options.cs +++ b/src/Ryujinx.Headless.SDL2/Options.cs @@ -106,6 +106,9 @@ namespace Ryujinx.Headless.SDL2 [Option("disable-ptc", Required = false, HelpText = "Disables profiled persistent translation cache.")] public bool DisablePTC { get; set; } + [Option("low-power-ptc", Required = false, HelpText = "Increases PTC performance for low power systems.")] + public bool LowPowerPTC { get; set; } + [Option("enable-internet-connection", Required = false, Default = false, HelpText = "Enables guest Internet connection.")] public bool EnableInternetAccess { get; set; } diff --git a/src/Ryujinx.Headless.SDL2/Program.cs b/src/Ryujinx.Headless.SDL2/Program.cs index e3bbd1e51..67d6ab4eb 100644 --- a/src/Ryujinx.Headless.SDL2/Program.cs +++ b/src/Ryujinx.Headless.SDL2/Program.cs @@ -566,6 +566,7 @@ namespace Ryujinx.Headless.SDL2 !options.DisableVSync, !options.DisableDockedMode, !options.DisablePTC, + options.LowPowerPTC, options.EnableInternetAccess, !options.DisableFsIntegrityChecks ? IntegrityCheckLevel.ErrorOnInvalid : IntegrityCheckLevel.None, options.FsGlobalAccessLogMode, diff --git a/src/Ryujinx.Tests/Cpu/CpuContext.cs b/src/Ryujinx.Tests/Cpu/CpuContext.cs index 81e8ba8c9..b896ea53f 100644 --- a/src/Ryujinx.Tests/Cpu/CpuContext.cs +++ b/src/Ryujinx.Tests/Cpu/CpuContext.cs @@ -11,9 +11,9 @@ namespace Ryujinx.Tests.Cpu { private readonly Translator _translator; - public CpuContext(IMemoryManager memory, bool for64Bit) + public CpuContext(IMemoryManager memory, bool for64Bit, bool lowPower) { - _translator = new Translator(new JitMemoryAllocator(), memory, AddressTable.CreateForArm(for64Bit, memory.Type)); + _translator = new Translator(new JitMemoryAllocator(), memory, AddressTable.CreateForArm(for64Bit, memory.Type, lowPower)); memory.UnmapEvent += UnmapHandler; } diff --git a/src/Ryujinx.Tests/Cpu/CpuTest.cs b/src/Ryujinx.Tests/Cpu/CpuTest.cs index da0f03e6b..193966782 100644 --- a/src/Ryujinx.Tests/Cpu/CpuTest.cs +++ b/src/Ryujinx.Tests/Cpu/CpuTest.cs @@ -62,7 +62,7 @@ namespace Ryujinx.Tests.Cpu _context = CpuContext.CreateExecutionContext(); - _cpuContext = new CpuContext(_memory, for64Bit: true); + _cpuContext = new CpuContext(_memory, for64Bit: true, lowPower: false); // Prevent registering LCQ functions in the FunctionTable to avoid initializing and populating the table, // which improves test durations. diff --git a/src/Ryujinx.Tests/Cpu/CpuTest32.cs b/src/Ryujinx.Tests/Cpu/CpuTest32.cs index 6a690834f..ac059a3ac 100644 --- a/src/Ryujinx.Tests/Cpu/CpuTest32.cs +++ b/src/Ryujinx.Tests/Cpu/CpuTest32.cs @@ -57,7 +57,7 @@ namespace Ryujinx.Tests.Cpu _context = CpuContext.CreateExecutionContext(); _context.IsAarch32 = true; - _cpuContext = new CpuContext(_memory, for64Bit: false); + _cpuContext = new CpuContext(_memory, for64Bit: false, lowPower: false); // Prevent registering LCQ functions in the FunctionTable to avoid initializing and populating the table, // which improves test durations. diff --git a/src/Ryujinx.Tests/Cpu/EnvironmentTests.cs b/src/Ryujinx.Tests/Cpu/EnvironmentTests.cs index 43c84c193..0e8b93b65 100644 --- a/src/Ryujinx.Tests/Cpu/EnvironmentTests.cs +++ b/src/Ryujinx.Tests/Cpu/EnvironmentTests.cs @@ -22,7 +22,7 @@ namespace Ryujinx.Tests.Cpu _translator ??= new Translator( new JitMemoryAllocator(), new MockMemoryManager(), - AddressTable.CreateForArm(true, MemoryManagerType.SoftwarePageTable)); + AddressTable.CreateForArm(true, MemoryManagerType.SoftwarePageTable, lowPower: false)); } [MethodImpl(MethodImplOptions.NoInlining | MethodImplOptions.NoOptimization)] diff --git a/src/Ryujinx.Tests/Memory/PartialUnmaps.cs b/src/Ryujinx.Tests/Memory/PartialUnmaps.cs index 3e5b47423..51df00a8d 100644 --- a/src/Ryujinx.Tests/Memory/PartialUnmaps.cs +++ b/src/Ryujinx.Tests/Memory/PartialUnmaps.cs @@ -58,7 +58,7 @@ namespace Ryujinx.Tests.Memory _translator ??= new Translator( new JitMemoryAllocator(), new MockMemoryManager(), - AddressTable.CreateForArm(true, MemoryManagerType.SoftwarePageTable)); + AddressTable.CreateForArm(true, MemoryManagerType.SoftwarePageTable, lowPower: false)); } [Test] diff --git a/src/Ryujinx/AppHost.cs b/src/Ryujinx/AppHost.cs index 7246be4b9..590a86c40 100644 --- a/src/Ryujinx/AppHost.cs +++ b/src/Ryujinx/AppHost.cs @@ -871,6 +871,7 @@ namespace Ryujinx.Ava ConfigurationState.Instance.Graphics.EnableVsync, ConfigurationState.Instance.System.EnableDockedMode, ConfigurationState.Instance.System.EnablePtc, + ConfigurationState.Instance.System.EnableLowPowerPtc, ConfigurationState.Instance.System.EnableInternetAccess, ConfigurationState.Instance.System.EnableFsIntegrityChecks ? IntegrityCheckLevel.ErrorOnInvalid : IntegrityCheckLevel.None, ConfigurationState.Instance.System.FsGlobalAccessLogMode,