[Ryujinx.Tests] Address dotnet-format issues (#5389)
* dotnet format style --severity info Some changes were manually reverted. * dotnet format analyzers --serverity info Some changes have been minimally adapted. * Restore a few unused methods and variables * Fix new dotnet-format issues after rebase * Address review comments * Address most dotnet format whitespace warnings * Apply dotnet format whitespace formatting A few of them have been manually reverted and the corresponding warning was silenced * Format if-blocks correctly * Run dotnet format after rebase and remove unused usings - analyzers - style - whitespace * Add comments to disabled warnings * Simplify properties and array initialization, Use const when possible, Remove trailing commas * cpu tests: Disable CA2211 for CodeBaseAddress and DataBaseAddress * Revert "Simplify properties and array initialization, Use const when possible, Remove trailing commas" This reverts commit 9462e4136c0a2100dc28b20cf9542e06790aa67e. * dotnet format whitespace after rebase * Apply suggestions from code review Co-authored-by: Ac_K <Acoustik666@gmail.com> * First dotnet format pass * Fix naming rule violations * Remove naming rule violation exceptions * Fix comment style * Use targeted new * Remove redundant code * Remove comment alignment * Remove naming rule exceptions * Add trailing commas * Use nameof expression * Reformat to add remaining trailing commas --------- Co-authored-by: Ac_K <Acoustik666@gmail.com>
This commit is contained in:
TSRBerry
GitHub
@@ -12,17 +12,21 @@ namespace Ryujinx.Tests.Cpu
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{
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#if SimdCvt
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#region "ValueSource (Types)"
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#region "ValueSource (Types)"
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private static uint[] _W_()
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{
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return new[] { 0x00000000u, 0x7FFFFFFFu,
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0x80000000u, 0xFFFFFFFFu };
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return new[] {
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0x00000000u, 0x7FFFFFFFu,
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0x80000000u, 0xFFFFFFFFu,
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};
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}
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private static ulong[] _X_()
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{
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return new[] { 0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
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0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul };
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return new[] {
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0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
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0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul,
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};
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}
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private static IEnumerable<ulong> _1S_F_WX_()
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@@ -62,19 +66,19 @@ namespace Ryujinx.Tests.Cpu
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yield return 0x00000000007FFFFFul; // +Max Subnormal
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yield return 0x0000000000000001ul; // +Min Subnormal (float.Epsilon)
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if (!NoZeros)
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if (!_noZeros)
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{
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yield return 0x0000000080000000ul; // -Zero
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yield return 0x0000000000000000ul; // +Zero
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}
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if (!NoInfs)
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if (!_noInfs)
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{
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yield return 0x00000000FF800000ul; // -Infinity
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yield return 0x000000007F800000ul; // +Infinity
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}
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if (!NoNaNs)
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if (!_noNaNs)
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{
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yield return 0x00000000FFC00000ul; // -QNaN (all zeros payload) (float.NaN)
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yield return 0x00000000FFBFFFFFul; // -SNaN (all ones payload)
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@@ -145,19 +149,19 @@ namespace Ryujinx.Tests.Cpu
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yield return 0x000FFFFFFFFFFFFFul; // +Max Subnormal
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yield return 0x0000000000000001ul; // +Min Subnormal (double.Epsilon)
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if (!NoZeros)
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if (!_noZeros)
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{
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yield return 0x8000000000000000ul; // -Zero
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yield return 0x0000000000000000ul; // +Zero
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}
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if (!NoInfs)
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if (!_noInfs)
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{
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yield return 0xFFF0000000000000ul; // -Infinity
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yield return 0x7FF0000000000000ul; // +Infinity
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}
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if (!NoNaNs)
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if (!_noNaNs)
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{
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yield return 0xFFF8000000000000ul; // -QNaN (all zeros payload) (double.NaN)
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yield return 0xFFF7FFFFFFFFFFFFul; // -SNaN (all ones payload)
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@@ -188,9 +192,9 @@ namespace Ryujinx.Tests.Cpu
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yield return rnd6;
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}
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}
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#endregion
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#endregion
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#region "ValueSource (Opcodes)"
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#region "ValueSource (Opcodes)"
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private static uint[] _F_Cvt_AMPZ_SU_Gp_SW_()
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{
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return new[]
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@@ -203,7 +207,7 @@ namespace Ryujinx.Tests.Cpu
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0x1E280000u, // FCVTPS W0, S0
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0x1E290000u, // FCVTPU W0, S0
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0x1E380000u, // FCVTZS W0, S0
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0x1E390000u // FCVTZU W0, S0
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0x1E390000u, // FCVTZU W0, S0
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};
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}
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@@ -219,7 +223,7 @@ namespace Ryujinx.Tests.Cpu
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0x9E280000u, // FCVTPS X0, S0
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0x9E290000u, // FCVTPU X0, S0
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0x9E380000u, // FCVTZS X0, S0
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0x9E390000u // FCVTZU X0, S0
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0x9E390000u, // FCVTZU X0, S0
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};
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}
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@@ -235,7 +239,7 @@ namespace Ryujinx.Tests.Cpu
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0x1E680000u, // FCVTPS W0, D0
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0x1E690000u, // FCVTPU W0, D0
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0x1E780000u, // FCVTZS W0, D0
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0x1E790000u // FCVTZU W0, D0
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0x1E790000u, // FCVTZU W0, D0
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};
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}
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@@ -251,7 +255,7 @@ namespace Ryujinx.Tests.Cpu
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0x9E680000u, // FCVTPS X0, D0
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0x9E690000u, // FCVTPU X0, D0
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0x9E780000u, // FCVTZS X0, D0
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0x9E790000u // FCVTZU X0, D0
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0x9E790000u, // FCVTZU X0, D0
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};
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}
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@@ -260,7 +264,7 @@ namespace Ryujinx.Tests.Cpu
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return new[]
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{
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0x1E188000u, // FCVTZS W0, S0, #32
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0x1E198000u // FCVTZU W0, S0, #32
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0x1E198000u, // FCVTZU W0, S0, #32
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};
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}
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@@ -269,7 +273,7 @@ namespace Ryujinx.Tests.Cpu
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return new[]
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{
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0x9E180000u, // FCVTZS X0, S0, #64
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0x9E190000u // FCVTZU X0, S0, #64
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0x9E190000u, // FCVTZU X0, S0, #64
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};
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}
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@@ -278,7 +282,7 @@ namespace Ryujinx.Tests.Cpu
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return new[]
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{
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0x1E588000u, // FCVTZS W0, D0, #32
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0x1E598000u // FCVTZU W0, D0, #32
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0x1E598000u, // FCVTZU W0, D0, #32
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};
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}
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@@ -287,7 +291,7 @@ namespace Ryujinx.Tests.Cpu
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return new[]
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{
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0x9E580000u, // FCVTZS X0, D0, #64
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0x9E590000u // FCVTZU X0, D0, #64
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0x9E590000u, // FCVTZU X0, D0, #64
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};
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}
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@@ -296,7 +300,7 @@ namespace Ryujinx.Tests.Cpu
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return new[]
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{
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0x1E220000u, // SCVTF S0, W0
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0x1E230000u // UCVTF S0, W0
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0x1E230000u, // UCVTF S0, W0
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};
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}
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@@ -305,7 +309,7 @@ namespace Ryujinx.Tests.Cpu
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return new[]
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{
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0x1E620000u, // SCVTF D0, W0
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0x1E630000u // UCVTF D0, W0
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0x1E630000u, // UCVTF D0, W0
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};
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}
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@@ -314,7 +318,7 @@ namespace Ryujinx.Tests.Cpu
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return new[]
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{
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0x9E220000u, // SCVTF S0, X0
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0x9E230000u // UCVTF S0, X0
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0x9E230000u, // UCVTF S0, X0
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};
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}
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@@ -323,7 +327,7 @@ namespace Ryujinx.Tests.Cpu
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return new[]
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{
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0x9E620000u, // SCVTF D0, X0
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0x9E630000u // UCVTF D0, X0
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0x9E630000u, // UCVTF D0, X0
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};
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}
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@@ -332,7 +336,7 @@ namespace Ryujinx.Tests.Cpu
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return new[]
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{
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0x1E028000u, // SCVTF S0, W0, #32
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0x1E038000u // UCVTF S0, W0, #32
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0x1E038000u, // UCVTF S0, W0, #32
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};
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}
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@@ -341,7 +345,7 @@ namespace Ryujinx.Tests.Cpu
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return new[]
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{
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0x1E428000u, // SCVTF D0, W0, #32
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0x1E438000u // UCVTF D0, W0, #32
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0x1E438000u, // UCVTF D0, W0, #32
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};
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}
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@@ -350,7 +354,7 @@ namespace Ryujinx.Tests.Cpu
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return new[]
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{
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0x9E020000u, // SCVTF S0, X0, #64
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0x9E030000u // UCVTF S0, X0, #64
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0x9E030000u, // UCVTF S0, X0, #64
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};
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}
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@@ -359,21 +363,22 @@ namespace Ryujinx.Tests.Cpu
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return new[]
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{
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0x9E420000u, // SCVTF D0, X0, #64
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0x9E430000u // UCVTF D0, X0, #64
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0x9E430000u, // UCVTF D0, X0, #64
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};
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}
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#endregion
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#endregion
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private const int RndCnt = 2;
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private const int RndCnt = 2;
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private static readonly bool NoZeros = false;
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private static readonly bool NoInfs = false;
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private static readonly bool NoNaNs = false;
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private static readonly bool _noZeros = false;
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private static readonly bool _noInfs = false;
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private static readonly bool _noNaNs = false;
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[Test, Pairwise] [Explicit]
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[Test, Pairwise]
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[Explicit]
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public void F_Cvt_AMPZ_SU_Gp_SW([ValueSource(nameof(_F_Cvt_AMPZ_SU_Gp_SW_))] uint opcodes,
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[Values(0u, 31u)] uint rd,
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[Values(1u)] uint rn,
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[Values(1u)] uint rn,
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[ValueSource(nameof(_1S_F_WX_))] ulong a)
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{
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opcodes |= ((rn & 31) << 5) | ((rd & 31) << 0);
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@@ -387,10 +392,11 @@ namespace Ryujinx.Tests.Cpu
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CompareAgainstUnicorn();
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}
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[Test, Pairwise] [Explicit]
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[Test, Pairwise]
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[Explicit]
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public void F_Cvt_AMPZ_SU_Gp_SX([ValueSource(nameof(_F_Cvt_AMPZ_SU_Gp_SX_))] uint opcodes,
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[Values(0u, 31u)] uint rd,
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[Values(1u)] uint rn,
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[Values(1u)] uint rn,
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[ValueSource(nameof(_1S_F_WX_))] ulong a)
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{
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opcodes |= ((rn & 31) << 5) | ((rd & 31) << 0);
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@@ -403,10 +409,11 @@ namespace Ryujinx.Tests.Cpu
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CompareAgainstUnicorn();
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}
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[Test, Pairwise] [Explicit]
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[Test, Pairwise]
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[Explicit]
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public void F_Cvt_AMPZ_SU_Gp_DW([ValueSource(nameof(_F_Cvt_AMPZ_SU_Gp_DW_))] uint opcodes,
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[Values(0u, 31u)] uint rd,
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[Values(1u)] uint rn,
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[Values(1u)] uint rn,
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[ValueSource(nameof(_1D_F_WX_))] ulong a)
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{
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opcodes |= ((rn & 31) << 5) | ((rd & 31) << 0);
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@@ -420,10 +427,11 @@ namespace Ryujinx.Tests.Cpu
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CompareAgainstUnicorn();
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}
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[Test, Pairwise] [Explicit]
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[Test, Pairwise]
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[Explicit]
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public void F_Cvt_AMPZ_SU_Gp_DX([ValueSource(nameof(_F_Cvt_AMPZ_SU_Gp_DX_))] uint opcodes,
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[Values(0u, 31u)] uint rd,
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[Values(1u)] uint rn,
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[Values(1u)] uint rn,
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[ValueSource(nameof(_1D_F_WX_))] ulong a)
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{
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opcodes |= ((rn & 31) << 5) | ((rd & 31) << 0);
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@@ -436,10 +444,11 @@ namespace Ryujinx.Tests.Cpu
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CompareAgainstUnicorn();
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}
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[Test, Pairwise] [Explicit]
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[Test, Pairwise]
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[Explicit]
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public void F_Cvt_Z_SU_Gp_Fixed_SW([ValueSource(nameof(_F_Cvt_Z_SU_Gp_Fixed_SW_))] uint opcodes,
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[Values(0u, 31u)] uint rd,
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[Values(1u)] uint rn,
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[Values(1u)] uint rn,
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[ValueSource(nameof(_1S_F_WX_))] ulong a,
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[Values(1u, 32u)] uint fBits)
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{
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@@ -457,10 +466,11 @@ namespace Ryujinx.Tests.Cpu
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CompareAgainstUnicorn();
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}
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[Test, Pairwise] [Explicit]
|
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[Test, Pairwise]
|
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[Explicit]
|
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public void F_Cvt_Z_SU_Gp_Fixed_SX([ValueSource(nameof(_F_Cvt_Z_SU_Gp_Fixed_SX_))] uint opcodes,
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[Values(0u, 31u)] uint rd,
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[Values(1u)] uint rn,
|
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[Values(1u)] uint rn,
|
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[ValueSource(nameof(_1S_F_WX_))] ulong a,
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[Values(1u, 64u)] uint fBits)
|
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{
|
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@@ -477,10 +487,11 @@ namespace Ryujinx.Tests.Cpu
|
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CompareAgainstUnicorn();
|
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}
|
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|
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[Test, Pairwise] [Explicit]
|
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[Test, Pairwise]
|
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[Explicit]
|
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public void F_Cvt_Z_SU_Gp_Fixed_DW([ValueSource(nameof(_F_Cvt_Z_SU_Gp_Fixed_DW_))] uint opcodes,
|
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[Values(0u, 31u)] uint rd,
|
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[Values(1u)] uint rn,
|
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[Values(1u)] uint rn,
|
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[ValueSource(nameof(_1D_F_WX_))] ulong a,
|
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[Values(1u, 32u)] uint fBits)
|
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{
|
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@@ -498,10 +509,11 @@ namespace Ryujinx.Tests.Cpu
|
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CompareAgainstUnicorn();
|
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}
|
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|
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[Test, Pairwise] [Explicit]
|
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[Test, Pairwise]
|
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[Explicit]
|
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public void F_Cvt_Z_SU_Gp_Fixed_DX([ValueSource(nameof(_F_Cvt_Z_SU_Gp_Fixed_DX_))] uint opcodes,
|
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[Values(0u, 31u)] uint rd,
|
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[Values(1u)] uint rn,
|
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[Values(1u)] uint rn,
|
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[ValueSource(nameof(_1D_F_WX_))] ulong a,
|
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[Values(1u, 64u)] uint fBits)
|
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{
|
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@@ -518,16 +530,17 @@ namespace Ryujinx.Tests.Cpu
|
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CompareAgainstUnicorn();
|
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}
|
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|
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[Test, Pairwise] [Explicit]
|
||||
[Test, Pairwise]
|
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[Explicit]
|
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public void SU_Cvt_F_Gp_WS([ValueSource(nameof(_SU_Cvt_F_Gp_WS_))] uint opcodes,
|
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[Values(0u)] uint rd,
|
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[Values(0u)] uint rd,
|
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[Values(1u, 31u)] uint rn,
|
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[ValueSource(nameof(_W_))] uint wn)
|
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{
|
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opcodes |= ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
|
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uint w31 = TestContext.CurrentContext.Random.NextUInt();
|
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ulong z = TestContext.CurrentContext.Random.NextULong();
|
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uint w31 = TestContext.CurrentContext.Random.NextUInt();
|
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ulong z = TestContext.CurrentContext.Random.NextULong();
|
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V128 v0 = MakeVectorE0E1(z, z);
|
||||
|
||||
SingleOpcode(opcodes, x1: wn, x31: w31, v0: v0);
|
||||
@@ -535,16 +548,17 @@ namespace Ryujinx.Tests.Cpu
|
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CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise] [Explicit]
|
||||
[Test, Pairwise]
|
||||
[Explicit]
|
||||
public void SU_Cvt_F_Gp_WD([ValueSource(nameof(_SU_Cvt_F_Gp_WD_))] uint opcodes,
|
||||
[Values(0u)] uint rd,
|
||||
[Values(0u)] uint rd,
|
||||
[Values(1u, 31u)] uint rn,
|
||||
[ValueSource(nameof(_W_))] uint wn)
|
||||
{
|
||||
opcodes |= ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
|
||||
uint w31 = TestContext.CurrentContext.Random.NextUInt();
|
||||
ulong z = TestContext.CurrentContext.Random.NextULong();
|
||||
uint w31 = TestContext.CurrentContext.Random.NextUInt();
|
||||
ulong z = TestContext.CurrentContext.Random.NextULong();
|
||||
V128 v0 = MakeVectorE1(z);
|
||||
|
||||
SingleOpcode(opcodes, x1: wn, x31: w31, v0: v0);
|
||||
@@ -552,16 +566,17 @@ namespace Ryujinx.Tests.Cpu
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise] [Explicit]
|
||||
[Test, Pairwise]
|
||||
[Explicit]
|
||||
public void SU_Cvt_F_Gp_XS([ValueSource(nameof(_SU_Cvt_F_Gp_XS_))] uint opcodes,
|
||||
[Values(0u)] uint rd,
|
||||
[Values(0u)] uint rd,
|
||||
[Values(1u, 31u)] uint rn,
|
||||
[ValueSource(nameof(_X_))] ulong xn)
|
||||
{
|
||||
opcodes |= ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
|
||||
ulong x31 = TestContext.CurrentContext.Random.NextULong();
|
||||
ulong z = TestContext.CurrentContext.Random.NextULong();
|
||||
ulong z = TestContext.CurrentContext.Random.NextULong();
|
||||
V128 v0 = MakeVectorE0E1(z, z);
|
||||
|
||||
SingleOpcode(opcodes, x1: xn, x31: x31, v0: v0);
|
||||
@@ -569,16 +584,17 @@ namespace Ryujinx.Tests.Cpu
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise] [Explicit]
|
||||
[Test, Pairwise]
|
||||
[Explicit]
|
||||
public void SU_Cvt_F_Gp_XD([ValueSource(nameof(_SU_Cvt_F_Gp_XD_))] uint opcodes,
|
||||
[Values(0u)] uint rd,
|
||||
[Values(0u)] uint rd,
|
||||
[Values(1u, 31u)] uint rn,
|
||||
[ValueSource(nameof(_X_))] ulong xn)
|
||||
{
|
||||
opcodes |= ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
|
||||
ulong x31 = TestContext.CurrentContext.Random.NextULong();
|
||||
ulong z = TestContext.CurrentContext.Random.NextULong();
|
||||
ulong z = TestContext.CurrentContext.Random.NextULong();
|
||||
V128 v0 = MakeVectorE1(z);
|
||||
|
||||
SingleOpcode(opcodes, x1: xn, x31: x31, v0: v0);
|
||||
@@ -586,9 +602,10 @@ namespace Ryujinx.Tests.Cpu
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise] [Explicit]
|
||||
[Test, Pairwise]
|
||||
[Explicit]
|
||||
public void SU_Cvt_F_Gp_Fixed_WS([ValueSource(nameof(_SU_Cvt_F_Gp_Fixed_WS_))] uint opcodes,
|
||||
[Values(0u)] uint rd,
|
||||
[Values(0u)] uint rd,
|
||||
[Values(1u, 31u)] uint rn,
|
||||
[ValueSource(nameof(_W_))] uint wn,
|
||||
[Values(1u, 32u)] uint fBits)
|
||||
@@ -598,8 +615,8 @@ namespace Ryujinx.Tests.Cpu
|
||||
opcodes |= ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
opcodes |= (scale << 10);
|
||||
|
||||
uint w31 = TestContext.CurrentContext.Random.NextUInt();
|
||||
ulong z = TestContext.CurrentContext.Random.NextULong();
|
||||
uint w31 = TestContext.CurrentContext.Random.NextUInt();
|
||||
ulong z = TestContext.CurrentContext.Random.NextULong();
|
||||
V128 v0 = MakeVectorE0E1(z, z);
|
||||
|
||||
SingleOpcode(opcodes, x1: wn, x31: w31, v0: v0);
|
||||
@@ -607,9 +624,10 @@ namespace Ryujinx.Tests.Cpu
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise] [Explicit]
|
||||
[Test, Pairwise]
|
||||
[Explicit]
|
||||
public void SU_Cvt_F_Gp_Fixed_WD([ValueSource(nameof(_SU_Cvt_F_Gp_Fixed_WD_))] uint opcodes,
|
||||
[Values(0u)] uint rd,
|
||||
[Values(0u)] uint rd,
|
||||
[Values(1u, 31u)] uint rn,
|
||||
[ValueSource(nameof(_W_))] uint wn,
|
||||
[Values(1u, 32u)] uint fBits)
|
||||
@@ -619,8 +637,8 @@ namespace Ryujinx.Tests.Cpu
|
||||
opcodes |= ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||
opcodes |= (scale << 10);
|
||||
|
||||
uint w31 = TestContext.CurrentContext.Random.NextUInt();
|
||||
ulong z = TestContext.CurrentContext.Random.NextULong();
|
||||
uint w31 = TestContext.CurrentContext.Random.NextUInt();
|
||||
ulong z = TestContext.CurrentContext.Random.NextULong();
|
||||
V128 v0 = MakeVectorE1(z);
|
||||
|
||||
SingleOpcode(opcodes, x1: wn, x31: w31, v0: v0);
|
||||
@@ -628,9 +646,10 @@ namespace Ryujinx.Tests.Cpu
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise] [Explicit]
|
||||
[Test, Pairwise]
|
||||
[Explicit]
|
||||
public void SU_Cvt_F_Gp_Fixed_XS([ValueSource(nameof(_SU_Cvt_F_Gp_Fixed_XS_))] uint opcodes,
|
||||
[Values(0u)] uint rd,
|
||||
[Values(0u)] uint rd,
|
||||
[Values(1u, 31u)] uint rn,
|
||||
[ValueSource(nameof(_X_))] ulong xn,
|
||||
[Values(1u, 64u)] uint fBits)
|
||||
@@ -641,7 +660,7 @@ namespace Ryujinx.Tests.Cpu
|
||||
opcodes |= (scale << 10);
|
||||
|
||||
ulong x31 = TestContext.CurrentContext.Random.NextULong();
|
||||
ulong z = TestContext.CurrentContext.Random.NextULong();
|
||||
ulong z = TestContext.CurrentContext.Random.NextULong();
|
||||
V128 v0 = MakeVectorE0E1(z, z);
|
||||
|
||||
SingleOpcode(opcodes, x1: xn, x31: x31, v0: v0);
|
||||
@@ -649,9 +668,10 @@ namespace Ryujinx.Tests.Cpu
|
||||
CompareAgainstUnicorn();
|
||||
}
|
||||
|
||||
[Test, Pairwise] [Explicit]
|
||||
[Test, Pairwise]
|
||||
[Explicit]
|
||||
public void SU_Cvt_F_Gp_Fixed_XD([ValueSource(nameof(_SU_Cvt_F_Gp_Fixed_XD_))] uint opcodes,
|
||||
[Values(0u)] uint rd,
|
||||
[Values(0u)] uint rd,
|
||||
[Values(1u, 31u)] uint rn,
|
||||
[ValueSource(nameof(_X_))] ulong xn,
|
||||
[Values(1u, 64u)] uint fBits)
|
||||
@@ -662,7 +682,7 @@ namespace Ryujinx.Tests.Cpu
|
||||
opcodes |= (scale << 10);
|
||||
|
||||
ulong x31 = TestContext.CurrentContext.Random.NextULong();
|
||||
ulong z = TestContext.CurrentContext.Random.NextULong();
|
||||
ulong z = TestContext.CurrentContext.Random.NextULong();
|
||||
V128 v0 = MakeVectorE1(z);
|
||||
|
||||
SingleOpcode(opcodes, x1: xn, x31: x31, v0: v0);
|
||||
@@ -671,4 +691,4 @@ namespace Ryujinx.Tests.Cpu
|
||||
}
|
||||
#endif
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
Reference in New Issue
Block a user