gdkchan
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161193e113
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CPU refactoring - move SIMD (scalar and vector) instructions to separate files by category, remove AILConv and use only the methods inside SIMD helper to extract/insert vector elements
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2018-02-17 18:06:11 -03:00 |
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gdkchan
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7c314eadcf
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Emit CIL directly for more SIMD instructions, add UCVTF (vector, scalar) and UZP2, fix XTN (?)
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2018-02-15 01:32:25 -03:00 |
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gdkchan
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55743c0cba
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Only throw undefined instruction exception at execution, not at translation stage
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2018-02-10 14:20:46 -03:00 |
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gdkchan
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6a3aa6cd88
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Add FVCTZS (fixed point variant) and LD1 (single structure variant) instructions
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2018-02-09 00:26:20 -03:00 |
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